| 1. 【PLL, DLL, TDC】之設計, 及其自動化編譯器設計 (Cell-Based Timing Circuits and Their Compilers) |
| 2. 三維晶片之【時脈同步技術】 (Clock Synchronization for 3D-ICs) |
| 3. 多裸晶整合晶片之【測試、監控、與自我療癒技術】 (Testing, Monitoring, and Self-Healing for Multi-Die ICs) |
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4. 【高安全性且容錯】之多核心晶片之設計與測試 (High-Security and Fault-Tolerant Multi-Core IC Design and Test) |
