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國立清華大學電機系 - 黃錫瑜 履歷 (Curriculum
Vitae of Shi-Yu Huang) Updated:
Sept.3,2018 |
黃錫瑜博士於 1988 年及 1992年畢業於台灣大學電機系, 分別取得學士及碩士學位,1997 年取得美國加州大學聖塔巴巴拉分校電機與電腦工程博士學位。之後,曾在美國矽谷的 National Semiconductor Manufacturing Corp. (國民半導體) 和新竹科學園區 Worldwide Semiconductor
Manufacturing Corp. (世大積體電路 製造) 短暫工作過兩年的時間。從 1999 年起,即在清大電機系服務迄今。 |
Prof. Shi‐Yu Huang received his B.S. and M.S. degrees in Electrical Engineering from National Taiwan University in 1988 and 1992, respectively, and his Ph.D. degree in Electrical and Computer Engineering from University of California, Santa Barbara, in 1997. He joined the faculty of Electrical Engineering Department, National Tsing Hua University, Taiwan, in 1999, where he is currently Professor. His research interests broadly cover VLSI design, automation, and testing, with prior experiences on formal verification, power estimation, fault diagnosis, and resilient nanometer SRAM Design. More recently, his research is concentrated on all‐digital timing circuit designs, such as all‐digital phase‐locked loop (PLL), all‐digital delay‐locked loop (DLL), time‐to‐digital converter (TDC), and their applications to parametric fault testing and reliability enhancement for 3D‐ICs. He has published more than 140 refereed technical papers.Prof. Huang ever co‐founded a company, TinnoTek Inc. (2007‐2012), specializing a cell‐based PLL compiler and system‐level power estimation tools. He received the best‐presentation or best‐paper awards from VLSI-DAT'06, VLSI-DAT'13,ATS'14,WRTLT'17, and ISOCC'18, respectively. Dr. Huang has actively served in the IEEE community, as Program/General Chairs/Co-Chairs in several IEEE technical conferences, including ATS, MTDT, VLSI-DAT, ITC-Asia, and Associate Editor for IEEE Trans. on Computers from 2015 to 2018. |