Research

Research Directions

Sensor ICs, intelligent imaging, data converters, and specialized mixed-signal interfaces—from pixel-level circuits to system-level sensing intelligence.

Research Area 01

Ultra-Low-Voltage, High-Dynamic-Range, Time-Domain CMOS Image Sensors

This research explores ultra-low-voltage CMOS image sensors that encode photocurrent or exposure information in the time domain. PWM and related time-domain pixel architectures enable wide dynamic range, low fixed-pattern noise, high frame rate, and extremely energy-efficient operation for always-on and self-powered sensing systems.

Selected publication records

A 0.5 V 4.95 µW 11.8 fps PWM CMOS Imager With 82 dB Dynamic Range and 0.055% Fixed-Pattern Noise, ISSCC.
A 0.5 V PWM CMOS Imager With 82 dB Dynamic Range and 0.055% Fixed-Pattern Noise, IEEE JSSC.
A 0.5 V, 14.28 kfps, 109 dB Smart Image Sensor With Array-Level Image Signal Processing for IoT Applications, IEEE Transactions on Electron Devices.
A 137 dB Dynamic Range and 0.32 V Self-Powered CMOS Imager With Energy-Harvesting Pixels, IEEE JSSC.

Research Area 02

Processing-in-Sensor and Intelligent Vision Sensor

Processing-in-sensor architectures integrate temporal, spatial, and neural processing directly with image acquisition. The goal is to reduce sensor-to-processor data movement and enable low-power feature extraction, motion and saliency detection, optical-flow sensing, and always-on intelligent vision.

Selected publication records

A 0.8 V Intelligent Vision Sensor With Tiny Convolutional Neural Network and Programmable Weights Using Mixed-Mode Processing-in-Sensor Technique, IEEE JSSC.
A 0.8 V Multimode Vision Sensor for Motion and Saliency Detection With Ping-Pong PWM Pixel, IEEE JSSC.
A 0.5 V Real-Time Computational CMOS Image Sensor With Programmable Kernel for Feature Extraction, IEEE JSSC.

Research Area 03

SAR and Noise-Shaping Data Converters

The group studies energy-efficient data conversion using SAR, noise-shaping SAR, hybrid SAR/TDC, and high-order loop-filter techniques. The emphasis is on low-voltage operation, robust analog implementation, compact area, and high dynamic range.

Selected publication records

A 12-ENOB Second-Order Noise Shaping SAR ADC with PVT-Insensitive Voltage-Time-Voltage Converter, IEEE JSSC.
A Calibration-Free 13-bit 10-MS/s Full-Analog SAR ADC With Continuous-Time Feedforward Cascaded Op-Amps, IEEE JSSC.
A 0.4 V 13-bit 270 kS/s SAR-ISDM ADC with Opamp-Less Time-Domain Integrator, IEEE JSSC.

Research Area 04

Time-Domain VTC/TDC Circuits

Voltage-to-time and time-to-digital circuits provide a compact and scaling-friendly route to precision mixed-signal conversion. Research includes VTC linearization, delay-based integration, time-domain residue processing, shared TDCs, and calibration techniques.

Selected publication records

A 0.5 V 12-bit SAR ADC Using Adaptive Time-Domain Comparator with Noise Optimization, IEEE JSSC.
A 2.02–5.16 fJ/Conversion-Step 10-Bit Hybrid Coarse-Fine SAR ADC With Time-Domain Quantizer, IEEE JSSC.
A 0.3 V 10-bit SAR ADC With First 2-bit Guess in 90 nm CMOS, IEEE TCAS-I.

Research Area 05

Infrared, SPAD, and Specialized Readout ICs

Specialized sensing interfaces include microbolometer ROICs, SPAD photon-counting imagers, biomedical sensing, optical encoders, and application-specific mixed-signal readout circuits. The work combines low noise, wide dynamic range, compact pixels, and robust calibration.

Selected publication records

A 15-bit ROIC with Current-Mode Folding Integration Technique for Microbolometer Thermal Imagers, IEEE TVLSI.
A 32×32 120.4 dB Self-Calibrated Analog Counters with Extrapolation for SPAD Imager, IEEE SENSORS.
A CMOS Time-of-Flight Depth Image Sensor With In-Pixel Background-Light Cancellation and Phase-Shifting Readout Technique, IEEE JSSC.