Electrical Engineering Dept.

National Tsing Hua University, Taiwan
(研究所課程) EE-6250 VLSI Testing

重要公告: Midterm Exam Time 6:20-8:00pm (Nov. 21, 2013)重要公告: Final Exam Time 6:20-8:00pm (Jan. 16,, 2014)Nov. 4 (Wed.) 6:30pm 於台達館 201 教室 , 助教會講解 Test Tool 使用方式...

　

【教 師】上課地點與時間: Every Thursday 6:30-9:20pm @ 清大台達館 201 室

【教 師】黃錫瑜 (syhuang@ee.nthu.edu.tw)

【助教】 李驊軒(blackeviling@gmail.com)
             曾增馥(sanchallenge@hotmail.com)
             廖允嘉(benjamin_1103@hotmail.com)

【課程大綱】請 按此下載

【TA Web Site】http://www.ee.nthu.edu.tw/ee625001
【Homework #1】(每人一組) 請按此下載題目 (Due on Nov. 14, 2013)

【Homework #2】(可兩人一組) 請按此下載題目 (Due on Jan. 9, 2014)

　

課程投影片 (Course Material):

(Adobe PDF format) (下載請按滑鼠右鍵 -> 選擇"另存目標")

合併講義檔 (按此下載)

No classes on Week1 (Sept. 19 中秋節) & Week 4 (Oct. 10 國慶日)

Course Material in PDF Format

Approximated Lecture Time

 Chapter 1: Introduction

Week 2        (Sept. 26)

 Chapter 2: Fault Modeling

Week 3        (Oct. 3)

 Chapter 3: Fault Simulation

Week 5, 6    (Oct. 17, Oct. 24)

 Chapter 4: Automatic Test Pattern Generation (ATPG)

Week 6, 7    (Oct. 24, Oct. 31)

 Chapter 5: Design-for-Testability and  Scan Test

Week 8, 9    (Nov. 7, Nov. 14)

 Chapter 6: Delay Test

Week 9        (Nov. 14)

 MIDTERM EXAM: (Chapter 1 - Chapter 6)

Week 10      (Nov. 21, 2013)
 Chapter 7: Built-In Self-Test             Week 11, 12 (Nov. 28, Dec. 5)

 Chapter 8: Test Compression

Week 12, 13  (Dec. 5, Dec. 12)

 Chapter 9: Boundary Scan Test

Week 14        (Dec. 19)

 Chapter 10: Parametric Interconnect Testing

Week 15, 16  (Dec. 26, Jan. 2)
 Chapter 11: Logic Diagnosis             Week 16, 17  (Jan. 9)

 FINAL EXAM: (Chapter 7 - Chapter 11)

Week 18      (Jan. 16, 2014)