Hsu, Klaus Yung-Jane (徐永珍)


Ph.D., National Tsing Hua University, ROC, 1989

Advanced Semiconductor Materials and Devices

High-frequency/High-speed IC Design

E-mail: yjhsu@ee.nthu.edu.tw


Dr. Klaus Yung-Jane Hsu received his B.S. and Ph.D degrees from the National Tsing Hua University, Hsinchu, Taiwan, in 1986 and 1989, respectively, both in electrical Engineering. After serving in the Electrical Engineering Department at the Chinese Naval Academy for two years, he joined the IBM Thomas J. Watson Research Center, New York, in 1991 as a Postdoctoral Research Fellow. Starting from August 1993, he joined the Electrical Engineering Department, National Tsing Hua University, where he is currently a professor. His research interests span from semiconductor materials, VLSI process, semiconductor devices, to integrated circuits. Among many of his research activities, Prof. Hsu did much work on studying the structural control and the electrical property of porous Si, which is important to future potential realization of Si-based OEIC, low-cost thin-film solar cells, thin-film battery, high-performance Si RFIC, etc. Recently, Prof. Hsu focused on the characterization and design of high-frequency/high-speed devices and ICs for wide-band communications. Prof. Hsu is also the director of the Innovation Incubator of National Tsing Hua University where currently 26 start-up companies reside in. Dr. Hsu has participated in several international conferences as a member of steering committee, technical committee, or organizing committee. He has received several Research Awards from the National Science Council, ROC. And he received the Outstanding Fellow Award, Electronics Devices and Materials Association, ROC in 1998. Dr. Hsu is a member of IEEE and MRS.


Recent Publications

Journal Papers

  1. C.H. Lee. C.C. Yeh, and Klaus Y.J. Hsu, 1996, "Formation of bottom oxides in porous silicon films by anodic oxidation", Appl. Surf. Sci. 92, pp.621-625.
  2. C.H. Lee. C.C. Yeh, H.L. Hwang, and Klaus Y.J. Hsu, 1996,"Characterization of porous silicon-on-insulator films prepared by anodic oxidation", Thin Solid Films 276, pp.147-150.
  3. C.C. Lin, H.L. Hwang, Klaus Y.J. Hsu, H.K. Liou, and K.N. Tu, 1996, "Reliability study of sub-micron titanium silicide contacts", Appl. Surf. Sci. 92, pp.660-664.
  4. H.L. Hwang, P.C. Chen, and Klaus Y.J. Hsu, 1996, "Ultra-thin gate dielectrics grown by low-temperature processes for ULSI devices applications", Appl. Surf. Sci. 92, pp. 180-192.
  5. H.L. Hwang, Klaus Y.J. Hsu, and H.Y. Ueng, 1996, "Fundamental studies of P-type doping of CdTe", J. Crystal Growth 161, pp. 73-81.
  6. Everett C.C. Yeh, M.S. Chiou, and Klaus Y.J. Hsu, 1997, "Computer simulation of percolated porous Si structure and its application to electrical conductivity simulation", Thin Solid Films 297, pp.88-91.
  7. Everett C.C. Yeh and Klaus Y.J. Hsu, 1998, "Electrical conductance simulation of two-dimensional directional site percolated networks for porous silicon structures", J. Appl. Phys. 83, pp. 326-331.
  8. E. C.-C. Yeh, J. H. Chan, T. H. Shieh, and K. Y.-J. Hsu, 1998, "Study on the electrical conduction of p+ porous silicon", physica status solidi (a) 165, pp. 63-67.
  9. Li-Zen Chen and Klaus Y.-J. Hsu, 1999, “Observation of current polarity effect in stressing as-formed sub-micron Al-Si-Cu/TiW/TiSi2 contacts”, Solid State Electronics 43, pp. 1031-1037.
  10. Jia-Yi Shung, Klaus Y.-J. Hsu, Yeu-Long Jiang, and Cho-Jen Tsai, 1999, “Design issues of two-dimensional amorphous silicon position-sensitive detectors”, Thin Solid Films 337, pp. 226-231.

Conference Papers

  1. Klaus Y.J. Hsu and S.M. Huang, 1996, "Profile design of Si/SiGe p-MODFET", Proc. 1996 International Electron Devices and Materials Symp. D, pp. 393-396.
  2. J.H. Conan Zhan and Klaus Y.J. Hsu, 1997, "Design and analysis of an insulated gate bipolar transistor (IGBT) with enhanced reverse blocking capability", (Invited), Proc. Ninth International Workshop on Physics of semiconductor Devices (IWPSD-97).
  3. Klaus Y.J. Hsu and S.M. Huang, 1997, "The profile design of strained SiGe-channel P-type modulation doped FET", MRS Symp. Proc. 450, pp.445-450.
  4. Klaus Y.J. Hsu, C.H. Lee, and C.C. Yeh, 1997, "Polycrystalline silicon grown on porous silicon-on-insulator substrates", MRS Symp. Proc.452, pp. 1007-1012.
  5. Ming-Hsiang Chiou, Yau-Jang Liu, Yu-Bin Guo, Lee-Jeng Chen, and Klaus Y. J. Hsu, 1999, “A new control chip for an electronic circuit breaker using 0.6m CMOS technology”, Proc. 1999 Analog VLSI Workshop, In Press.
  6. Jia-Wei Wu, Klaus Yung-Jane Hsu, Tze-Liang Lee, and Mon-Song Liang, 2000, “Critical examination on interconnect scaling challenge to SIA roadmap on interconnect in deep sub-micron VLSI technology”, Proc. 2000 IEDMS, (to appear).